Q-MPW launches at APS Global Physics Summit
Our quarterly superconducting multi-project wafer programme opened at the APS Global Physics Summit, with one qualified process and its variation published upfront.
We launched Q-MPW, our quarterly multi-project wafer programme for superconducting devices, at the APS Global Physics Summit in March 2026.
Q-MPW puts your designs on a shared wafer, on a fixed schedule, without the cost of a full run. It is meant for prototypes, early-stage devices and academic research.
Every round uses one qualified process: a 300 nm aluminium ground plane on 500 µm high-resistivity silicon, with Manhattan-style Josephson junctions and air bridges. On this process we have demonstrated transmon T1 up to 250 µs and CPW resonator Qi up to about one million.
We also publish the variation you should design for: junction resistance within ±20% across the wafer and ±10% within a block.
The wafer is divided into 20 × 30 mm blocks, each with six 10 × 10 mm chip slots. Participants get blocks according to their tier; the smallest tier, Starter, is one block. You can submit up to two designs per round.
Every submission is covered by an NDA, signed before you send a file. Only your team and our foundry see your design, and wafer previews show your chips and nothing else.
The Q-MPW Technical Guide has the full layer table, design rules and submission steps.